Write protect input implementation for a simultaneous operation flash memory device
US6331950A · kind A · utility
71Cited by
15References
12Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Oct 19, 1999 |
| Grant date | Dec 18, 2001 |
| Priority date | — |
| Expiry date | Oct 19, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An input circuit for a flash memory device is disclosed. The input circuit includes an input for receiving a voltage signal from an external source representing a digital logic signal. The input circuit further includes a pull up circuit which is coupled with the input and pulls the input to a high logic level when the input is not connected to any external source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.