Method for forming a trench structure in a silicon substrate

US6337255B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Stephan Bradl · Regensburg, DE
• Olaf Heitzsch · Coswig, DE
• Michael J. Schmidt · Queen Creek, US

Key dates

• Filing date: Mar 24, 2000
• Grant date: Jan 8, 2002
• Expiry date: Mar 24, 2020

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/969
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for forming a trench structure in a silicon substrate, which trench structure serves for electrically insulating a first region of the substrate from a second substrate region. The method proceeds from a growth of a thermal oxide layer on the substrate surface and an application and patterning of a mask layer over the thermal oxide layer. A trench of predetermined depth is subsequently etched into the silicon substrate through the patterned mask layer. The trench is filled by a deposition of a conformal covering oxide layer on the substrate with an essentially uniform thickness that is sufficient for completely filling the trench. Afterwards, a polysilicon layer is deposited on the covering oxide layer and a chemical mechanical planarization method is carried out with high selectivity S between the polysilicon material and the oxide material in order to obtain a flat surface. In a further method step, the layer is additionally removed by an essentially nonselective, joint etching of the polysilicon material and of the oxide material while maintaining a planar surface produced in the preceding planarization step. The etching operation is carried out at least until all the p…