Method of forming pad openings and fuse openings
US6348398B1 · kind B1 · utility
16Cited by
2References
19Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 4, 2001 |
| Grant date | Feb 19, 2002 |
| Priority date | — |
| Expiry date | May 4, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/01033
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming pad openings and fuse openings over a wafer. A wafer having pads and fuses thereon is provided. A passivation layer and a photoresist layer are sequentially formed over the wafer. A photo-exposure and development operation is conducted to remove the photoresist layer above the pads. An etching operation is conducted to remove the passivation layer above the pads as well as the photoresist layer and a portion of the passivation layer above the fuses. Finally, the photoresist layer is removed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.