High performance mechanism to support O state horizontal cache-to-cache transfers
US6349368B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 24, 1999 |
| Grant date | Feb 19, 2002 |
| Priority date | — |
| Expiry date | Jun 24, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0862
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiprocessor data processing system includes an interconnect, a plurality of processing units coupled to the interconnect, and at least one system memory and a plurality of caches coupled to the plurality of processing units. A cache suitable for use in such a data processing system includes data storage containing multiple data granules and a number of state fields associated with the data granules. Each state field has a plurality of possible states including an OR state that indicates that an associated granule is consistent with corresponding data in the memory, that the associated data granule has unknown coherency with respect to other peer caches in the data processing system, and that the cache is responsible, among all of its peer caches that may store the associated data granule in a memory-consistent state with unknown coherency, for sourcing the data granule in response to a request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.