Bit line landing pad and borderless contact on bit line stud with etch stop layer and manufacturing method thereof
US6350649B1 · kind B1 · utility
26Cited by
12References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2000 |
| Grant date | Feb 26, 2002 |
| Priority date | — |
| Expiry date | Oct 30, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/0335
Abstract
An etch-stop layer is selectively provided between layers of a multiple-layered circuit so as to allow for outgassing of impurities during subsequent fabrication processes. The etch-stop layer is formed over an underlying stud so as to serve as an alignment target during formation of an overlying stud formed in an upper layer to be coupled to the underlying stud. In this manner multiple-layered circuits, for example memory devices, can be fabricated in relatively dense configurations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.