Patent · US Expired

Integrated circuit with a phase locked loop

US6351167B1 · kind B1 · utility

14Cited by

3References

8Claims

0Family size

Assignee

Siemens Aktiengesellschaft · DE

Inventors

Thomas Hein · Hersbruck, DE
Thilo Marx · Villingen-Schwenningen, DE
Patrick Heyne · Hersbruck, DE
Torsten Partsch · San Jose, US

Key dates

Filing date	Jun 30, 2000
Grant date	Feb 26, 2002
Priority date	—
Expiry date	Jun 30, 2020

Classification

Technology area (CPC H)Electricity
CPC primaryH03L7/0818
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A phase regulator is connected, on the input side, to the output of a phase comparator and generates a control signal in a manner dependent on the phase difference ascertained by said comparator. Updating of the control signal fed to a control input of a first delay unit is triggered by an edge of the first output clock signal occurring at the clock output of the first delay unit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.