Active termination in a multidrop memory system
US6356106B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 12, 2000 |
| Grant date | Mar 12, 2002 |
| Priority date | — |
| Expiry date | Sep 12, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0298
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An active termination circuit is incorporated into the devices connected to a multidrop bus. By including the active termination circuit on the devices instead of the bus, termination resistors can be removed from the system PCB, which saves costs and frees up precious space on the PCB. The active termination circuit has a termination enabled state and a termination disabled state. The active termination circuit is selectively placed into the enabled or disabled states in specified devices depending upon, for example, device location or communication traffic on the bus. The multidrop system can also utilize a separate passive termination mechanism in combination with the active termination circuits utilized in the devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.