Method of forming barrier layers for damascene interconnects
US6358832B1 · kind B1 · utility
68Cited by
15References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2000 |
| Grant date | Mar 19, 2002 |
| Priority date | — |
| Expiry date | Aug 18, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76835
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A damascene interconnect containing a dual etch stop/diffusion barrier. The conductive material of the damascene interconnect is capped with a conductive metal diffusion barrier cap, typically using electroless deposition, and, optionally, with a dielectric etch-stop layer. An optional chemical mechanical polish-stop layer may also be present. The different methods of the invention allow the CMP stop, reactive-ion etch stop, and metal diffusion barrier requirements of the different layers to be decoupled. A preferred conductive material is copper.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.