Multichip module having a silicon carrier substrate
US6359790B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 3, 2000 |
| Grant date | Mar 19, 2002 |
| Priority date | — |
| Expiry date | Jul 3, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor chips are mounted in flip-chip technology on the multilayer wiring of the silicon carrier substrate. The underside of the substrate is provided with soldering contacts in the form of solder agglomerations forming a ball grid array (BGA). The underside is structured such that a cavity which narrows in the shape of a funnel from the underside up to the lowest conductor track plane is formed for each soldering contact. The cavities are each filled by the respective solder agglomeration and the solder agglomeration itself makes contact with the multilayer wiring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.