Method for producing a flip chip package
US6365435B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2001 |
| Grant date | Apr 2, 2002 |
| Priority date | — |
| Expiry date | Mar 22, 2021 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/974
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a no-flow underfill process 400, a substrate 10 is heated to an elevated temperature prior to dispensing underfill 5 thereon. The underfill 5 flows more readily over mask portions 20 and conductors 25 on the substrate 10, filling in spaces between the conductors 25 and the masking portions 20, thereby preventing air from being trapped thereabout. In addition, when a bumped die 40 is heated during placement on the substrate 10 with the underfill 5 therebetween, the underfill 5 flows around bumps 45 more readily thereby preventing air from being trapped thereabout. The result is a flip chip semiconductor package having a lower void density.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.