Vertical fuse structure for integrated circuits and a method of disconnecting the same
US6369437B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 12, 1999 |
| Grant date | Apr 9, 2002 |
| Priority date | — |
| Expiry date | Jan 12, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A vertical fuse structure and methods for customization of integrated circuits include a substantially vertically-oriented interconnect structure or “fuse” which provides for a more densely packed and thus smaller programmable integrated circuit. In a preferred embodiment, a vertical interconnect structure is fabricated by forming a first interconnect layer, forming an insulating layer over the first interconnect layer in which substantially vertically-oriented vias are patterned in contact with the first interconnect layer, filling the vias with a conductive plug, and forming a second interconnect layer over the insulating layer in contact with the conductive plug. The vertical interconnect structure is preferably disconnected by forming a narrow, substantially vertical disconnect cavity through the second interconnect layer and a portion of the conductive plug, thereby removing the connection between the second interconnect layer and the plug.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.