Selective formation of hydrogen rich PECVD silicon nitride for improved NMOS transistor performance
US6372569B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 18, 2000 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Jan 18, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A method of selective formation of SiN layer in a semiconductor device comprising the following steps. A semiconductor structure having at least one PMOS transistor and one NMOS transistor formed therein is provided. The PMOS and NMOS transistors each have source/drain regions, a gate, and salicide contact regions. An undoped silicate glass (USG) layer is deposited over the semiconductor structure and the PMOS and NMOS transistors. An H2-rich PECVD silicon nitride layer is deposited over the undoped silicate glass layer and over the PMOS and NMOS transistors. The H2-rich PECVD silicon nitride layer is patterned, etched, and removed from over the PMOS transistor. An inter-level dielectric (ILD) layer is formed over the structure. The ILD layer is densified whereby hydrogen diffuses from the H2-rich PECVD silicon nitride layer overlying the NMOS transistor into the source/drain of the NMOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.