Method for reducing IC package delamination by use of internal baffles
US6373126B1 · kind B1 · utility
2Cited by
7References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 26, 2000 |
| Grant date | Apr 16, 2002 |
| Priority date | — |
| Expiry date | Apr 26, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Barrier structures are included within the packaging material of a packaged semiconductor device, such barrier structures including barrier bodies which overlie the die-die pad assembly of the device on either side thereof. The barrier bodies act as baffles which limit diffusion of moisture through the packaging material into the area of the die-die pad assembly of the device, the barrier bodies including apertures therethrough which control such diffusion in a manner that avoids delamination problems in the area of the die-die pad assembly, meanwhile also avoiding undesirable trapping of gas within the packaging material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.