Semiconductor package and method for forming same

US6376266B1 · kind B1 · utility

Assignee

• SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC · US

Inventors

• James P. Letterman, Jr. · Mesa, US
• Kenneth Teik Kheong Low · Singapore, SG
• Saat Shukri Embong · Kuala Terengganu, MY
• Chee Hiong CHEW · Seremban, MY
• Boon Huat Lim · Kluang, MY
• Aik Chong Tan · Johor Bahru, MY
• Albert J. Laninga · Tempe, US
• Santhiragasen al sengram Pillay · Kuala Pilah, MY
• Michael J. Seddon · Gilbert, US
• Brian A. Webb · Chandler, US

Key dates

• Filing date: Nov 6, 2000
• Grant date: Apr 23, 2002
• Expiry date: Dec 29, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L2924/18165
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor package (8) with a die (10) having die pads (16) coupled to inner ends (22) of interconnects (20), the die (10) and the interconnects (20) are molded in mold compound (30) with mounting surface (12) and outer ends (24) exposed. A semiconductor die has an interconnect surface opposite the mounting surface.