Method of forming plugs and local interconnect for embedded memory/system-on-chip (SOC) applications
US6376358B1 · kind B1 · utility
12Cited by
12References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2001 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Mar 15, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/485
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for fabricating system-on-chip devices which contain embedded DRAM along with other components such as SRAM or logic circuits is disclosed. Local interconnects, via salicides and tungsten are formed subsequent to polysilicon plugs required for the operation of the DRAM and SRAM or logic. Also disclosed are systems-on-chips MIM/MIS capacitive devices produced by the inventive process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.