Inventor · Boise, ID, US

Todd R. Abbott

53Patents
12h-index
20Co-inventors
80Inventor score

Filing activity: Sep 26, 1996 → Sep 19, 2012

Most-cited inventions

PatentTitleAreaCited byStatus
US7365385B2 DRAM layout with vertical FETs and method of formation Electricity 126 Expired
US7262089B2 Methods of forming semiconductor structures Electricity 89 Expired
US7518182B2 DRAM layout with vertical FETs and method of formation Emerging Cross-Sectional Technologies 65 Expired
US7736969B2 DRAM layout with vertical FETS and method of formation Emerging Cross-Sectional Technologies 35 Active
US6599789B1 Method of forming a field effect transistor Electricity 34 Expired
US8482047B2 DRAM layout with vertical FETS and method of formation Emerging Cross-Sectional Technologies 18 Active
US7453103B2 Semiconductor constructions Electricity 17 Active
US8274106B2 DRAM layout with vertical FETs and method of formation Emerging Cross-Sectional Technologies 17 Active
US7348236B2 Formation of memory cells and select gates of NAND memory arrays Electricity 16 Expired
US6727168B2 Method of forming local interconnects Electricity 15 Expired
US6812529B2 Suppression of cross diffusion and gate depletion Electricity 14 Expired
US7012024B2 Methods of forming a transistor with an integrated metal silicide gate electrode Electricity 13 Expired
US6376358B1 Method of forming plugs and local interconnect for embedded memory/system-on-chip (SOC) applications Electricity 12 Expired
US7560336B2 DRAM layout with vertical FETs and method of formation Electricity 12 Active
US6583518B2 Cross-diffusion resistant dual-polycide semiconductor structure and method Emerging Cross-Sectional Technologies 11 Expired
US6723597B2 Method of using high-k dielectric materials to reduce soft errors in SRAM memory cells, and a device comprising same Electricity 11 Expired
US7768051B2 DRAM including a vertical surround gate transistor Electricity 11 Expired
US7982255B2 Flash memory with recessed floating gate Electricity 10 Active
US6677650B2 Silicon plugs and local interconnect for embedded memory and system-on-chip (SOC) applications Electricity 8 Expired
US8389360B2 DRAM layout with vertical FETs and method of formation Electricity 8 Active
US7989866B2 DRAM layout with vertical FETS and method of formation Emerging Cross-Sectional Technologies 8 Active
US7342272B2 Flash memory with recessed floating gate Electricity 8 Expired
US7566620B2 DRAM including a vertical surround gate transistor Electricity 7 Active
US6987291B2 Integrated transistor circuitry Electricity 7 Expired
US7153731B2 Method of forming a field effect transistor with halo implant regions Electricity 6 Expired

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.