High-speed lateral bipolar device in SOI process
US6376880B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 27, 1999 |
| Grant date | Apr 23, 2002 |
| Priority date | — |
| Expiry date | Sep 27, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D10/311
Abstract
A lateral bipolar transistor includes a semiconductor layer overlying an electrically insulating material and an insulating layer overlying a central portion of the semiconductor layer. A contact hole resides in the insulating layer and a conductive material overlies the insulating layer and makes electrical contact with the semiconductor layer through the contact hole, thereby forming a base contact. The semiconductor layer has a first conductivity type in a central region which substantially underlies the conductive material, and has a second conductivity type in regions adjacent the central region. The first region forms a base region and the adjacent regions form a collector region and an emitter region, respectively. A method of forming a lateral bipolar transistor device is also disclosed. The method includes forming a semiconductor layer over an insulating material and forming an insulating layer over the semiconductor material. A base contact hole is then formed in the insulating layer and a conductive base contact region is formed over a portion of the insulating layer. The base contact region overlies the base contact hole and makes an electrical connection to a middle po…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.