Patent · US Expired

Edge-triggered, self-resetting pulse generator

US6380779B1 · kind B1 · utility

5Cited by
4References
22Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 12, 2001
Grant dateApr 30, 2002
Priority date
Expiry dateJul 12, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K3/355
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

An edge-triggered, self-resetting pulse generator where a pulse is initiated by a voltage transition and is reset using feedback from the output. A voltage transition is presented at one input of a two-input NOR gate and at the input of a circuit with three inverters in series. The output from the circuit with three inverters in series connects to the second input of the two-input NOR gate. This combination creates a voltage pulse that drives a transfer FET. The transfer FET creates a voltage on a latch. The latch stores the voltage presented on the input and then drives a delay-chain with an odd number of inverters. The output of the delay-chain drives a second transfer FET that resets the latch.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.