Capacitor and method for forming same
US6384468B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 7, 2000 |
| Grant date | May 7, 2002 |
| Priority date | — |
| Expiry date | Feb 7, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit interconnect level capacitor is disclosed. In an exemplary embodiment, the capacitor includes a first insulator layer overlying an interconnect level surface of a semiconductor substrate having active devices. First and second conductive lines are provided in the first insulator layer and are separated by a trench defined by the first insulator layer and by sidewalls of the first and second conductive lines. A first conductive barrier layer overlies and connects the first and second conductive lines, and a second insulator layer overlies the first conductive barrier layer. A second conductive barrier layer overlies the second insulator layer, and a third conductive line is disposed in the trench and overlies the second conductive barrier layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.