Method for forming a dielectric layer in a semiconductor device by using etch stop layers
US6384482B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 15, 2001 |
| Grant date | May 7, 2002 |
| Priority date | — |
| Expiry date | Aug 15, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31053
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention provides a method for forming a dielectric layer in a semiconductor device by using etch stop layers, and a semiconductor structure formed by the method. The method in accordance with the invention comprises: providing a semiconductor substrate having raised portions and recessed portions; forming a first etch stop layer covering the raised portions and the recessed portions; forming a dielectric layer covering an upper surface of the first etch stop layer, wherein the dielectric layer has a thickness substantially smaller than that of each of the raised portions; forming a second etch stop layer covering the dielectric layer; and performing a planarizing step for polishing the second etch stop layer and the dielectric layer until exposing the first etch stop layer on an upper surface of the raised portions, and remaining a plurality of remaining portions of the second etch stop layer on the planarized surface, and remaining the dielectric layer between raised portions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.