Methods for forming integrated redistribution routing conductors and solder bumps
US6389691B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 5, 1999 |
| Grant date | May 21, 2002 |
| Priority date | — |
| Expiry date | Apr 5, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming routing conductors and solder bumps on a microelectronic substrate includes the steps of forming an under bump metallurgy layer on the substrate and forming a solder structure on the under bump metallurgy layer where the solder structure includes an elongate portion and an enlarged width portion. The portions of the under bump metallurgy layer not covered by the solder structure can be selectively removed using the solder structure as a mask. In addition, the solder is caused to flow from the elongate portion of the solder structure to the enlarged width solder portion thereby forming a raised solder bump. This step is preferably performed by heating the solder structure above its liquidus temperature allowing surface tension induced internal pressures to affect the flow. Various solder structures are also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.