Dynamic address mapping and redundancy in a modular memory device
US6393504B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2000 |
| Grant date | May 21, 2002 |
| Priority date | — |
| Expiry date | Jan 28, 2020 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A memory device which utilizes a plurality of memory modules coupled in parallel to a master I/O module through a bus. Each memory module has independent address and command decoders to enable independent operation. Thus each memory module is activated by commands on the bus only when a memory access operation is performed within the particular memory module. Each memory module has a programmable identification register which stores a communication address of the module. The communication address for each module can be changed during operation of the memory device by a command from the bus. The memory device includes redundant memory modules to replace defective memory modules. Replacement can be carried out through commands on the bus.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.