MOSFET power device manufactured with reduced number of masks by fabrication simplified processes

US6404025B1 · kind B1 · utility

Assignee

• Magepower Semiconductor Corp. · US

Inventors

• Fwu-Iuan Hshieh · Saratoga, US
• Yan Man Tsui · Union City, US

Key dates

• Filing date: Oct 2, 1997
• Grant date: Jun 11, 2002
• Expiry date: Oct 2, 2017

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/112

Abstract

This invention discloses a semiconductor substrate supports a semiconductor power device. The semiconductor substrate includes a plurality of polysilicon segments disposed over a gate oxide layer including two outermost segments and inner segments wherein each of the inner segments functioning as a gate and the two outermost segments functioning as a field pate and an equal potential ring separated by an oxide-plug gap having an aspect ratio greater or equal to 0.5. Each of the inner segments functioning as a gate having a side wall spacer surrounding edges of the inner segments, and the oxide plug gap being filled with an oxide plug for separating the field plate from the equal potential ring. A plurality of power transistor cells disposed in the substrate for each of the gates covered by an overlying insulation layer having a plurality of contact openings defined therein. A plurality of metal segments covering the overlying insulation layer and being in electric contact with the power transistor cells through the contact openings. A plurality of deep-and-narrow gaps between the metal segments wherein each gap having an aspect ratio equal or greater than 0.5. A passivation layer d…