Method of forming dynamic random access memory
US6406968B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2001 |
| Grant date | Jun 18, 2002 |
| Priority date | — |
| Expiry date | Jan 23, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a dynamic random access memory. A substrate having a memory cell region and a logic circuit region is provided. The substrate also has a first dielectric layer thereon. The first dielectric layer in the memory cell region has a bit line and a node contact while the first dielectric layer in the logic circuit region has a first metallic interconnect. An intermediate dielectric layer is formed over the first dielectric layer such that the intermediate dielectric layer in the logic circuit region has a second metallic interconnect that connects electrically with the first metallic interconnect. A capacitor is formed in the intermediate dielectric layer within the memory cell region. A second dielectric layer is formed over the substrate. A third metallic interconnect is formed in the second dielectric layer such that the third metallic interconnect and the second metallic interconnect are electrically connected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.