Electrostatic discharge protection circuits with latch-up prevention function
US6410963B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 16, 2001 |
| Grant date | Jun 25, 2002 |
| Priority date | — |
| Expiry date | Oct 16, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/601
Abstract
An electrostatic discharge protection which is electrically coupled with an interface terminal and a devices area, at least include a first bipolar junction transistor, a second bipolar junction transistor, a first MOS transistor, and a second MOS transistor. Both bipolar junction transistors forms the well-known silicon controlled rectifier, first MOS transistor locates between interface terminal and second bipolar junction transistor and second MOS transistor locates between emitter of second bipolar junction transistor and ground point, and gates of both MOS transistor electrically coupled with voltage base point whose voltage is equal to work voltage of devices area. While devices area is turned off, silicon controlled rectifier would be latch-up and provides function of electrostatic discharge protection. While devices area is turned on, second MOS transistor also is turned on so that part of current flows into ground point but not flows into second bipolar junction transistor. Thus, positive feedback between two bipolar junction transistors is reduced and then latch-up is eliminated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.