PROCESS FOR FORMING THIN GATE OXIDE WITH ENHANCED RELIABILITY BY NITRIDATION OF UPPER SURFACE OF GATE OF OXIDE TO FORM BARRIER OF NITROGEN ATOMS IN UPPER SURFACE REGION OF GATE OXIDE, AND RESULTING PRODUCT

US6413881B1 · kind B1 · utility

Assignee

• LSI Logic Corporation · US

Inventors

• Sheldon Aronowitz · San Jose, US
• John Haywood · Santa Clara, US
• James Kimball · San Jose, US
• Helmut Puchner · Santa Clara, US
• Ravindra M. Kapre · San Jose, US
• Nicholas K. Eib · San Jose, US

Key dates

• Filing date: Mar 9, 2000
• Grant date: Jul 2, 2002
• Expiry date: Mar 9, 2020

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/28211
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A process for inhibiting the passage of dopant from a gate electrode into a thin gate oxide comprises nitridation of the upper surface of the thin gate oxide, prior to formation of the gate electrode over the gate oxide, to thereby form a barrier of nitrogen atoms in the upper surface region of the gate oxide adjacent the interface between the gate oxide and the gate electrode to inhibit passage of dopant atoms from the gate electrode into the thin gate oxide during annealing of the structure. In one embodiment, a selective portion of silicon oxide on a silicon substrate may be etched to thin the oxide to the desired thickness using a nitrogen plasma with a bias applied to the silicon substrate. Nitridation of the surface of the etched silicon oxide is then carried out in the same apparatus by removing the bias from the silicon substrate.