Thermally annealed, low defect density single crystal silicon
US6416836B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 13, 1999 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Oct 13, 2019 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/2822
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A single crystal silicon wafer having a central axis, a front side and a back side which are generally perpendicular to the central axis, a central plane between the front and back sides, a circumferential edge, and a radius extending from the central axis to the circumferential edge. The wafer comprises first and second axially symmetric regions. The first axially symmetric region extends radially inwardly from the circumferential edge, contains silicon self-interstitials as the predominant intrinsic point defect, and is substantially free of agglomerated interstitial defects. The second axially symmetric region has vacancies as the predominant intrinsic point defect, comprises a surface layer extending from the front side toward the central plane and a bulk layer extending from the surface layer to the central plane, wherein the number density of agglomerated vacancy defects present in the surface layer is less than the concentration in the bulk layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.