Microelectronic packages in which second microelectronic substrates are oriented relative to first microelectronic substrates at acute angles
US6418033B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 16, 2000 |
| Grant date | Jul 9, 2002 |
| Priority date | — |
| Expiry date | Nov 16, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/09701
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Microelectronic packages include a first microelectronic substrate, a second microelectronic substrate that is oriented at an acute angle relative to the first microelectronic substrate, and first solder bumps between the first and second microelectronic substrates, adjacent an edge of the second microelectronic substrate, that connect the second microelectronic substrate to the first microelectronic substrate and that are confined to within the edge of the second microelectronic substrate. The edge of the second microelectronic substrate is adjacent the vertex of the acute angle. A third microelectronic substrate also may be provided on the first microelectronic substrate that laterally overlaps the second microelectronic substrate. Second solder bumps connect the third microelectronic substrate to the first microelectronic substrate. The second and third microelectronic substrates may be oriented parallel to one another at the acute angle relative to the first microelectronic substrate. Alternatively, second solder bumps are adjacent a first edge of the third microelectronic substrate and opposite a second edge of the third microelectronic substrate, wherein the second edge of th…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.