Block rendering method for a graphics subsystem
US6421053B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 1999 |
| Grant date | Jul 16, 2002 |
| Priority date | — |
| Expiry date | May 24, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/80
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Primitives are divided into span groups of 2N spans, and then processed in M×N blocks of pixels, with the pixel blocks preferably being as close to square as possible and therefore optimized for small spans and texture mapping. Each span group is rendered block-by-block in a serpentine manner from an initial or entry block, first in a direction away from the long edge of the primitive and then in a direction towards the long edge. The interpolators include a one-deep stack onto which pixel and texel information for the initial or entry block are pushed before rendering any other blocks within the span group. Blocks or pairs of blocks within different span subgroups of the span group are then alternately rendered, such that rendering zig-zags between the span subgroups as it proceeds to the end of the span group. Once the first end of a span group is reached, the values for the initial or entry block are popped from the stack and rendering resumes from the initial or entry block in the opposite direction, but in the same serpentine or zig-zag manner, until the other end of the span group is reached. The next span group, if any, is rendered starting with a block adjacent to the…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.