Chip scale electrical test fixture
US6424140B1 · kind B1 · utility
0Cited by
7References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 3, 2000 |
| Grant date | Jul 23, 2002 |
| Priority date | — |
| Expiry date | May 3, 2020 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R1/0483
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A test fixture and method of isolating an electrical contact of chip scale package for testing the electrical characteristics of the electrical contact has a base and an isolation plate. The isolation plate is configured to contact and ground all of the electrical contacts of the chip scale package under test, except for a selected subset of the electrical contacts. The isolation plate includes a hole that provides access to the selected subset of electrical contacts to allow a test probe access to the isolated electrical contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.