Patent · US Expired

Ferroelectric memory array composed of a multiplicity of memory cells each having at least one selection transistor and one storage capacitor driven via word lines and bit lines

US6424558B2 · kind B2 · utility

2Cited by

8References

5Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Georg Braun · Hersbruck, DE
Heinz Honigschmid · Starnberg, DE

Key dates

Filing date	Jan 22, 2001
Grant date	Jul 23, 2002
Priority date	—
Expiry date	Jan 22, 2021

Classification

Technology area (CPC G)Physics
CPC primaryG11C11/22
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A ferroelectric storage assembly containing a storage cell array composed of a plurality of storage cells is described. Each storage cell contains at least one selector transistor and a storage capacitor, and can be controlled via word lines and bit lines. A short-circuit transistor is located over each storage capacitor in order to protect the storage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.