Method of forming solder bumps on a semiconductor wafer
US6426282B1 · kind B1 · utility
16Cited by
7References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 2000 |
| Grant date | Jul 30, 2002 |
| Priority date | — |
| Expiry date | May 4, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming solder bumps on a semiconductor wafer utilizing a low temperature biasable electrostatic chuck. In particular, the method comprises the steps of providing at least one bond pad on the semiconductor wafer, forming a barrier layer over the bond pad, and forming the solder bumps upon the at least one bond pad. By controlling the temperature and biasing of the electrostatic chuck, the barrier layer, such as nickel vanadium, exhibits a low tensile or compressive stress.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.