Semiconductor device package and lead frame with die overhanging lead frame pad
US6433424B1 · kind B1 · utility
10Cited by
14References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Oct 26, 2001 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | Oct 26, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor die are soldered or epoxy bonded to lead frame pads and overhang the pads to reduce thermal differential expansion and contraction stresses applied to the die from the lead frame pad. A plastic housing of standard size is unchanged in dimension, but contains a greater total silicon die area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.