Dual-RIE structure for via/line interconnections
US6433436B1 · kind B1 · utility
13Cited by
8References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 26, 1999 |
| Grant date | Aug 13, 2002 |
| Priority date | — |
| Expiry date | May 26, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A structure and process to define a via/interconnect structure is described. The structure is formed by reactive ion etching (RIE) where vias are formed first then the interconnects. The disclosed method relies on first depositing a metal with a thickness equivalent to the total height of the via and interconnect. Once vias are delineated by forming a hard mask and lithography, the lines are patterned using a lithographic step. Vias and lines are formed using lithography and RIE in one step and interfacial integrity is maintained resulting in high electromigration performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.