Semiconductor structure having a doped conductive layer
US6436818B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 1999 |
| Grant date | Aug 20, 2002 |
| Priority date | — |
| Expiry date | Dec 10, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/664
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus for forming word line stacks comprise one, or a combination of the following: a silicon diffusion barrier layer, doped with oxygen or nitrogen, coupled between a bottom silicon layer and a conductor layer; an amorphous silicon diffusion barrier coupled between a polysilicon layer and a conductor layer; a thin nitride layer coupled between a bottom silicon layer and a titanium silicide conductor layer, and a bottom silicon layer coupled to a conductor layer, which comprises C54-titanium silicide. Word line stacks formed by the methods of the invention are used in sub-0.25 micron line width applications and have a lower resistivity and improved thermal stability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.