Ferroelectric device with bismuth tantalate capping layer and method of making same

US6437380B1 · kind B1 · utility

Assignee

• Symetrix, Inc. · US

Inventors

• Myoungho Lim · Colorado Springs, US
• Vikram Joshi · Los Gatos, US
• Narayan Solayappan · Colorado Springs, US
• Larry D. McMillan · Colorado Springs, US
• Carlos A. Paz de Araujo · Colorado Springs, US

Key dates

• Filing date: Mar 28, 2001
• Grant date: Aug 20, 2002
• Expiry date: Mar 28, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/684

Abstract

An integrated circuit device includes a thin film of bismuth-containing layered superlattice material having a thickness not exceeding 100 nm, a capping layer thin film of bismuth tantalate, and an electrode. The capping layer has a thickness in a range of from 3 nm to 30 nm and is deposited between the thin film of layered superlattice material and the electrode to increase dielectric breakdown voltage. Preferably the capping layer contains an excess amount of bismuth relative to the stoichiometrically balanced amount represented by the balanced stoichiometric formula BiTaO4. Preferably, the layered superlattice material is ferroelectric SBT or SBTN. Preferably, the integrated circuit device is a nonvolatile ferroelectric memory. Heating treatments for fabrication of the integrated circuit device containing the bismuth tantalate capping layerare conducted at temperatures not exceeding 700° C., preferably in a range of from 650° C. to 700° C.