Patent · US Expired

Method and apparatus for aligning wafers

US6440821B1 · kind B1 · utility

6Cited by
6References
25Claims
0Family size

Assignee

Inventors

Key dates

Filing dateFeb 14, 2001
Grant dateAug 27, 2002
Priority date
Expiry dateFeb 14, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method for aligning wafers includes defining a grid on a wafer; determining a grid offset parameter based on an offset between the grid and an external reference point defined on the wafer; and aligning the wafer based on the grid offset parameter and the external reference point. A system for aligning wafers includes a database server and a tool. The database server is adapted to store a grid offset parameter associated with a wafer. The grid offset parameter defines an offset between a grid defined on the wafer and an external reference point defined on the wafer. The tool is adapted to align the wafer based on the grid offset parameter associated with the wafer and the external reference point.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.