Integrated circuit configuration having at least one capacitor and method for producing the same

US6441424B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Helmut Klose · Munich, DE
• Volker Lehmann · Hersbruck, DE
• Hans Reisinger · Grünwald, DE
• Wolfgang Hönlein · Unterhaching, DE

Key dates

• Filing date: Oct 21, 1998
• Grant date: Aug 27, 2002
• Expiry date: Oct 21, 2018

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/318

Abstract

An integrated circuit configuration, in particular is a DRAM cell configuration, includes a capacitor disposed on a first substrate and a portion with a contact disposed on a second substrate. The first substrate is connected to the second substrate, with the contact adjoining the capacitor. The first substrate and the second substrate can be connected essentially in an unadjusted manner, if capacitor elements are distributed over the first substrate and a contact surface of the contact is so large that when the substrates are connected, the contact in each case adjoins at least one of the capacitor elements, which then defines the capacitor. The capacitor may include a plurality of capacitor elements, which makes its capacitance especially high. A method is also provided for producing the integrated circuit configuration.