Lateral double diffused metal oxide semiconductor device
US6441431B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 1999 |
| Grant date | Aug 27, 2002 |
| Priority date | — |
| Expiry date | Dec 3, 2019 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
Abstract
An embodiment of the instant invention is a transistor formed on a semiconductor substrate of a first conductivity type and having an upper surface, the transistor comprising: a well region (well 204 of FIG. 1a) formed in the semiconductor substrate (layer 202 of FIG. 1a), the well region of a second conductivity type opposite that of the first conductivity type; a source region (source region 208 of FIG. 1a) formed in the well region in the semiconductor substrate, the source region of the second conductivity type; a drain region (drain 210 of FIG. 1a) formed in the semiconductor substrate and spaced away from the source region by a channel region (given by length L1+L2), the drain region of the second conductivity type; a conductive gate electrode (layer 218 of FIG. 1a) disposed over the semiconductor substrate and over the channel region; a gate insulating layer (layer 214 of FIG. 1a) disposed between the conductive gate electrode and the semiconductor substrate and having a length, the gate insulating layer comprising: a first portion of the gate insulating layer which has a first length (L1) and a first thickness; a second portion of the gate insulating layer which has a secon…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.