SOI semiconductor device opening implantation gettering method
US6444534B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 30, 2001 |
| Grant date | Sep 3, 2002 |
| Priority date | — |
| Expiry date | Jan 30, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6713
Abstract
The present invention relates to a method of manufacturing a semiconductor device, including the steps of providing a silicon-on-insulator semiconductor wafer having a silicon film formed on an insulator layer; forming a semiconductor device in the silicon film, the semiconductor device including a semiconductor element, an interlayer dielectric over the semiconductor device, and at least one opening passing through the interlayer dielectric and in communication with the semiconductor element; implanting inert atoms into the semiconductor element by passing the inert atoms through the opening at an energy and at a dose sufficient to form a damaged region in the semiconductor element, wherein the oxide insulating layer acts as a mask to block implantation of the inert atoms into other portions of the semiconductor device, and the damaged region comprises gettering sites; and subjecting the semiconductor device to conditions to getter at least one impurity into the gettering sites from adjacent portions of the semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.