Method of forming fuse area structure including protection film on sidewall of fuse opening in semiconductor device
US6448113B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2000 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Dec 18, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fuse area structure in a semiconductor device and a method of forming the same are provided. The fuse area structure includes a protection film formed of a passivation film for preventing moisture from seeping into the sidewall of an exposed fuse opening. In order to form the protection film, an etching stop film is formed on a fuse line, and the fuse opening is formed at the same time using the etching stop film when a contact hole required for the semiconductor device is formed. A conductive material layer for forming an upper interconnection layer is formed on the entire surface of a resultant structure on which the contact hole and the fuse opening are formed. The conductive material layer formed on the fuse opening is removed. The exposed etching stop film is removed. Finally, the fuse area is completed by forming a passivation film on the entire surface of the resultant structure and removing the passivation film formed on the bottom of the fuse opening into which laser is to be irradiated. Moisture is effectively prevented from seeping into the interfaces between interlayer dielectric films since the protection film of the passivation film is formed on the sidewall of the …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.