Patent · US Expired

Thinning and dicing of semiconductor wafers using dry etch, and obtaining semiconductor chips with rounded bottom edges and corners

US6448153B2 · kind B2 · utility

17Cited by
19References
28Claims
0Family size

Assignee

Inventors

Key dates

Filing dateDec 28, 2000
Grant dateSep 10, 2002
Priority date
Expiry dateDec 28, 2020

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/117
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor wafer is diced before thinning. The wafer is diced only part of the way through, to form grooves which are at least as deep as the final thickness of each chip to be obtained from the wafer. Then, the wafer is placed into a non-contact wafer holder, and the wafer backside is blanket etched with a dry etch, for example, atmospheric pressure plasma etch. The wafer is thinned until the grooves are exposed from the backside. The dry etch leaves the chip's backside smooth. After the grooves have been exposed, the dry etch is continued to remove damage from the chip sidewalls and to round the chips' bottom edges and coners. As a result, the chip becomes more reliable, and in particular more resistant to thermal and other stresses.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.