Patent · US Expired

Method of making a semiconductor device having a dual damascene interconnect spaced from a support structure

US6448177B1 · kind B1 · utility

33Cited by
5References
8Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 27, 2001
Grant dateSep 10, 2002
Priority date
Expiry dateMar 27, 2021

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/0002
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A semiconductor device and an improved method for making it are described. The semiconductor device comprises a dual damascene interconnect that includes a conductive line. The device further includes a support structure that is spaced from the conductive line, and an insulating layer that is formed on the support structure and the conductive line. In the method for forming that device, a support structure is formed on a substrate, and an insulating layer is formed adjacent to it. Portions of the insulating layer are removed to form a via and a trench, which are filled with a conductive material to generate a dual damascene interconnect that includes a conductive line, wherein the conductive line is spaced from the support structure.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.