Xiaorong Morrow
8Patents
6h-index
10Co-inventors
56Inventor score
Filing activity: Mar 27, 2001 → Apr 19, 2010
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6448177B1 | Method of making a semiconductor device having a dual damascene interconnect spaced from a support structure | Electricity | 33 | Expired |
| US7727892B2 | Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects | Electricity | 14 | Expired |
| US6661094B2 | Semiconductor device having a dual damascene interconnect spaced from a support structure | Electricity | 9 | Expired |
| US7122481B2 | Sealing porous dielectrics with silane coupling reagents | Electricity | 8 | Expired |
| US7339271B2 | Metal-metal oxide etch stop/barrier for integrated circuit interconnects | Electricity | 6 | Expired |
| US6794755B2 | Surface alteration of metal interconnect in integrated circuits for electromigration and adhesion improvement | Electricity | 6 | Expired |
| US7456490B2 | Sealing porous dielectrics with silane coupling reagents | Electricity | 6 | Active |
| US8299617B2 | Method and apparatus for forming metal-metal oxide etch stop/barrier for integrated circuit interconnects | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.