Semiconductor package and circuit board for making the package
US6448506B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 28, 2000 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Dec 28, 2020 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/041
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are semiconductor packages and stacks thereof. An example package includes an insulative substrate having a first surface, first apertures, a second aperture, and circuit traces on the first surface. A first portion of each circuit trace overlies a first aperture and an end of the circuit trace is near the second aperture. A solder ball is in each first aperture, fused to the overlying circuit trace. A semiconductor die is in the second aperture and is electrically connected to the ends of the traces. A third aperture may extend through the first portion of each circuit trace. A second package can be stacked on a first package. Solder balls of the second package each fuse with an underlying solder ball of the first package through a third aperture of the first package. The dies of the stacked packages may be positioned for optical communication with each other.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.