Memory cell with trench, and method for production thereof
US6448610B2 · kind B2 · utility
11Cited by
7References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 7, 2001 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Mar 7, 2021 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
Abstract
The invention relates to a memory cell that has a trench. A trench capacitor is configured in the trench. In addition, a vertical transistor is formed in the trench, above the trench capacitor. To connect the gate material of the vertical transistor to a word line, a dielectric layer (12) having an internal opening (13) is provided in the trench (3) above the gate material (23). The dielectric layer is in the form of a dielectric ring. The dielectric ring allows self-aligned connection of the word line to the gate material of the vertical transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.