Implementation of a conditional move instruction in an out-of-order processor
US6449713B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 18, 1998 |
| Grant date | Sep 10, 2002 |
| Priority date | — |
| Expiry date | Nov 18, 2018 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3017
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A technique for handling a conditional move instruction in an out-of-order data processor. The technique involves detecting a conditional move instruction within an instruction stream, and generating multiple instructions according to the detected conditional move instruction. The technique further involves replacing the conditional move instruction within the instruction stream with the generated multiple instructions. The generated multiple instructions are generated such that each of the generated multiple instructions executes using no more than two input ports of an execution unit. The generated multiple instructions include a first generated instruction that produces a condition result indicating whether a condition exists, and a second generated instruction that inputs the condition result as a portion of an operand which identifies a register of the out-of-order data processor. The second generated instruction performs a first move operation when the condition is determined to exist, and a second move operation when the condition is determined not to exist.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.