Derrick R. Meyer
45Patents
23h-index
44Co-inventors
81Inventor score
Filing activity: Jun 29, 1990 → Feb 13, 2004
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5155843A | Error transition mode for multi-processor system | Mechanical Engineering; Lighting; Heating | 118 | Expired |
| US7174467B1 | Message based power management in a multi-processor system | Emerging Cross-Sectional Technologies | 85 | Expired |
| US6490661B1 | Maintaining cache coherency during a memory read operation in a multiprocessing computer system | Physics | 82 | Expired |
| US7051218B1 | Message based power management | Emerging Cross-Sectional Technologies | 72 | Expired |
| US6266744A | Store to load forwarding using a dependency link file | Physics | 58 | Expired |
| US6275905A | Messaging scheme to maintain cache coherency and conserve system memory bandwidth during a memory read operation in a multiprocessing computer system | Physics | 54 | Expired |
| US6098166A | Speculative issue of instructions under a load miss shadow | Physics | 52 | Expired |
| US6473837B1 | Snoop resynchronization mechanism to preserve read ordering | Physics | 51 | Expired |
| US6141734A | Method and apparatus for optimizing the performance of LDxL and STxC interlock instructions in the context of a write invalidate protocol | Physics | 39 | Expired |
| US6665742B2 | SYSTEM FOR RECONFIGURING A FIRST DEVICE AND/OR A SECOND DEVICE TO USE A MAXIMUM COMPATIBLE COMMUNICATION PARAMETERS BASED ON TRANSMITTING A COMMUNICATION TO THE FIRST AND SECOND DEVICES OF A POINT-TO-POINT LINK | Electricity | 34 | Expired |
| US6760838B2 | System and method of initializing and determining a bootstrap processor [BSP] in a fabric of a distributed multiprocessor computing system | Physics | 31 | Expired |
| US6557048B1 | Computer system implementing a system and method for ordering input/output (IO) memory operations within a coherent portion thereof | Physics | 31 | Expired |
| US6393502B1 | System and method for initiating a serial data transfer between two clock domains | Physics | 30 | Expired |
| US6745272B2 | System and method of increasing bandwidth for issuing ordered transactions into a distributed communication system | Electricity | 30 | Expired |
| US6938094B1 | Virtual channels and corresponding buffer allocations for deadlock-free computer system operation | Physics | 27 | Expired |
| US6668292B2 | System and method for initiating a serial data transfer between two clock domains | Physics | 27 | Expired |
| US7093105B2 | Method and apparatus for determining availability of a queue to which a program step is issued out of program order | Physics | 27 | Expired |
| US7146510B1 | Use of a signal line to adjust width and/or frequency of a communication link during system operation | Emerging Cross-Sectional Technologies | 25 | Expired |
| US6360314B1 | Data cache having store queue bypass for out-of-order instruction execution and method for same | Physics | 25 | Expired |
| US6018798A | Floating point unit using a central window for storing instructions capable of executing multiple instructions in a single clock cycle | Physics | 25 | Expired |
| US6529999B1 | Computer system implementing system and method for ordering write operations and maintaining memory coherency | Physics | 24 | Expired |
| US6424688B1 | Method to transfer data in a system with multiple clock domains using clock skipping techniques | Physics | 23 | Expired |
| US6405305B1 | Rapid execution of floating point load control word instructions | Physics | 23 | Expired |
| US5924120A | Method and apparatus for maximizing utilization of an internal processor bus in the context of external transactions running at speeds fractionally greater than internal transaction times | Physics | 21 | Expired |
| US7640315B1 | Implementing locks in a distributed processing system | Physics | 20 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.