Method and apparatus for detecting defects in the manufacture of an electronic device
US6452677B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 13, 1998 |
| Grant date | Sep 17, 2002 |
| Priority date | — |
| Expiry date | Feb 13, 2018 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/773
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The invention provides a unique method and apparatus for detecting defects in an electronic device. In one preferred embodiment, the electronic device is a semiconductor integrated circuit (IC), particularly one of a plurality of IC dies fabricated on a wafer of silicon or other semiconductor material. The defect detection operation is effectuated by a unique combination of critical dimension measurement and pattern defect inspection techniques. During the initial scan of the surface of the wafer, in an attempt to locate the appropriate area for a critical dimension (CD) feature or element that is to be measured, a “best fit” comparison is made between a reference image and scanned images. The critical dimension measurements are conducted on a “best fit” image. In addition, a “worst fit” comparison is made between the reference and scanned images. A “worst fit” determination represents pattern distortions or defects in the ICs under evaluation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.