Method for fabricating a trench capacitor

US6455369B1 · kind B1 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Matthias Forster · Dresden, DE
• Jorn Lutzen · Dresden, DE
• Martin Gutsche · Dorfen, DE
• Anja Morgenschweis · Dresden, DE

Key dates

• Filing date: Aug 20, 2001
• Grant date: Sep 24, 2002
• Expiry date: Aug 20, 2021

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S438/964

Abstract

A method for fabricating a trench capacitor, that includes steps of: providing a silicon substrate; forming a trench, having a lower region and a surface, in the silicon substrate; and forming a doped layer in the silicon substrate in the lower region of the trench. In addition, a roughened silicon layer that has silicon grains with a diameter ranging from essentially 10 to 100 nm is produced in the lower region of the trench. A dielectric intermediate layer is applied on the roughened silicon layer, and the trench is filled with a doped layer.